Impact of nanometric buried Oxide layer on subthreshold swing and drain conductance of junctionless accumulation mode MOSFET for analog circuit applications

Authors

• Supratim Datta ¹
• Arpan Deyasi * ¹
• Arighna Basak ²
• Angsuman Sarkar ³

1. Department of Electronics and Communication Engineering, RCC Institute of Information Technology, India.
2. Department of Electronics and Communication Engineering, Brainware University, India.
3. Department of ECE, Kalyani Government Engineering College, West Bengal, India.

Abstract

Drain conductance to drain current ratio is analytically investigated for junctionless accumulation mode MOSFET in presence of ultrathin buried oxide layer invoking the effect of conduction band tunnelling, within realistic range of dimensional configurations in nano regime. By taking into account the flatband voltage’s influence and the image charge effect at the oxide-semiconductor interface, subthreshold swing is evaluated over practical range of applied bias. Comparative study reveals that 42% and 36.5% improvements are found with published literature for the conductance to current ratio, whereas reduction of corresponding subthreshold swing is 51% and 34% respectively, considering all the data are computed w.r.t reported value of drain current; for identical structural and electrical configurations. Accuracy of the analytical findings is verified against that of the TCAD software’s numerical analysis. Result speaks in favour of the proposed candidate for amplifying low voltage signal in large scale along with suppression of leakage effect for analog amplifier applications.

Graphical Abstract

Keywords

• Subthreshold Swing
• Dielectric constant
• Nano-Dimension
• Buried Oxide layer
• Drain Conductance to Drain Current Ratio
• Doping Density

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