VCO Design and Simulation Using TSMC 0.18 m Process to Meet IEEE802.11a Requirements

Authors

Abstract

A complimentary topology is used incorporating TSMC 0.18 mm process to design a CMOS VCO with the center frequency of 5.4 GHz. Simulation results showed tuning range of 13%. The phase noise at 1 MHz offset was measured to be -118.7 dBc/Hz. The VCO core power consumption was 3.3 mW when the power supply voltage was set to 1.5 V. Simulation results verified that the designed structure meets the IEEE802.11a requirements.

Keywords

• CMOS.
• VCO
• en
• phase noise
• tuning range. IEEE802.11a