A 0.4V, 790µW CMOS Low Noise Amplifier in the Sub-Threshold Region at 1.5GHz
Authors
Abstract
A fully integrated low-noise amplifier (LNA) with 0.4V supply voltage and ultra-low power consumption at 1.5GHz by folded cascode structure is presented. The proposed LNA is designed in a TSMC 0.18 µm CMOS technology, in which the all transistors are biased in sub-threshold region. Through the use of the proposed circuit for the gain enhancement in this structure and using forward body bias technique, a very high figure of merit is achieved, in comparison to the similar structures. The LNA provides a power gain of 14.7bB with a noise figure of 2.9dB while consuming only 790µW dc power. Also, the impedance matching of the input and output circuit in its operating frequency is desirable and in the whole circuit bandwidth, input and output isolation is below -33dB.
