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MJEE-1

Majlesi Journal of Electrical Engineering

Editor-in-Chief: Farbod Razzazi, PhD

Online ISSN: 2345-3796

Print ISSN: 2345-377X

Publishes Quarterly

Original Article
Design and Analysis of Three New SRAM Cells

Three new SRAM cells are proposed in this paper. Increasing area overhead is the major concern in SRAM design. One of the new structures is included four transistors instead of six transistors as it is used in conventional 6T-SRAM cell for very high density embedded SRAM applications. The structure of proposed SRAM employs one word-line […]

Original Article
Designing Low Dropout Regulator with Low Settling Time, High Power Supply Rejection and Low Line and Load Regulation

Low dropout regulators are one of the most important factures of many portable devices. Thus, consider to the complexity of the circuits and increasing request for portable devices, for increasing battery life and minimizing supply noise, regulators with high efficiency, low output noise and small size is required. In these paper two methods to improve […]

Original Article
A 0.4V, 790µW CMOS Low Noise Amplifier in the Sub-Threshold Region at 1.5GHz

A fully integrated low-noise amplifier (LNA) with 0.4V supply voltage and ultra-low power consumption at 1.5GHz by folded cascode structure is presented. The proposed LNA is designed in a TSMC 0.18 µm CMOS technology, in which the all transistors are biased in sub-threshold region. Through the use of the proposed circuit for the gain enhancement […]

Original Article
A Low Noise Amplifier with Low Voltage, Low Power Consumption, and Improved Linearity at 5 GHz

In this paper a low-noise amplifier with 0.6 V supply voltage, low power consumption, and improved linearity at= 5 GHz is introduced in 0.18 µm CMOS technology. By using a feed-forward structure and a multi-gated configuration in the proposed circuit, linearity of the circuit is significantly improved, while only 122 µW more power is consumed […]

Original Article
Two Methods for Linearity Improvement in Digitally Controlled Delay Elements: Current Starved Type

Current starved delay elements (CSDEs) are among the popular architectures to manipulate rising or falling edges of signals in order to meet timing requirements. The digitally controllable generations of these topologies are now monotonic and reasonably power efficient, but they lack linearity in full range. Inherently, this subject may not seem problematic because by setting […]