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IJND-1

International Journal of Nano Dimension (Int. J. Nano Dimens.)

Editor-in-Chief: Dr. Khalil Pourshamsian; Director-in-Charge: Dr. Babak Sadeghi

Online ISSN: 2228-5059

Print ISSN: 2008-8868

Publishes Quarterly

Original Article
Design of low power random number generators for quantum-dot cellular automata

Quantum-dot cellular automata (QCA) are a promising nanotechnology to implement digital circuits at the nanoscale. Devices based on QCA have the advantages of faster speed, lower power consumption, and greatly reduced sizes. In this paper, we are presented the circuits, which generate random numbers in QCA.  Random numbers have many uses in science, art, statistics, […]

Original Article
High speed Radix-4 Booth scheme in CNTFET technology for high performance parallel multipliers

A novel and robust scheme for radix-4 Booth scheme implemented in Carbon Nanotube Field-Effect Transistor (CNTFET) technology has been presented in this paper. The main advantage of the proposed scheme is its improved speed performance compared with previous designs. With the help of modifications applied to the encoder section using Pass Transistor Logic (PTL), the […]

Original Article
Design of a low power high speed 4-2 compressor using CNTFET 32nm technology for parallel multipliers

In this article a low power and low latency 4-2 compressor has been presented. By using modified truth table and Pass Transistor Logic (PTL) a novel structure has been proposed which outperforms previous designs from the frequency of operation view point. The proposed design method has reduced the total transistor count considerably which will lead […]

Original Article
Low-power min/max architecture in 32nm CNTFET technology for fuzzy applications based on a novel comparator

In this paper, the design of a novel low-power Min/Max circuit using Carbon Nanotube Field-Effect Transistor (CNTFET) technology has been discussed. By employing a new structure for the implementation of digital comparator, a high performance configuration has been obtained which consumes small area on chip due to the low transistor count used for its implementation. […]