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IJND-1

International Journal of Nano Dimension (Int. J. Nano Dimens.)

Editor-in-Chief: Dr. Khalil Pourshamsian; Director-in-Charge: Dr. Babak Sadeghi

Online ISSN: 2228-5059

Print ISSN: 2008-8868

Publishes Quarterly

Original Article
A fast approximate quaternary full adder using a parallel design based on Carbon nanotube FET

Novel design methodologies of digital circuits have been caught in the spotlight of attention as a result of the dramatic increase in available data and the requirement for data processing among which Full adder cells are significant elements in arithmetic circuits design. The use of approximate computing and Multi Value Logic (MVL) can improve computational […]

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Original Article
Power-efficient and high-speed design of approximate full adders using CNFET technology

Full adder cells are the major fundamental elements of larger arithmetic circuits, which are mostly located along the critical path of circuits. Therefore, the design of low-power and high-speed full adder cells is critical. In this paper, there are two new inexact full adder cells proposed based on Carbon Nanotube Field Effect Transistor (CNFET) technology. Using the HSPICE simulator […]