skip to main content
Menu
MJEE-1

Majlesi Journal of Electrical Engineering

Editor-in-Chief: Farbod Razzazi, PhD

Online ISSN: 2345-3796

Print ISSN: 2345-377X

Publishes Quarterly

Original Article
A Low-Power CMOS Optical Communication Front-End Using a Three-Stage TIA for 5Gb/s Applications

In this paper, an optical communication receiver system for 5Gbps applications is proposed concerning power consumption. An inductor-less circuit in three-stages is proposed as the trans-impedance amplifier (TIA), which benefits from the inherent low input resistance of a common gate topology as the first stage. By forming two zeros in this TIA, proper frequency response […]

Original Article
A Novel Full Subtractor /Full Adder Design in Quantum Cellular Automata

Quantum cellular automata (QCA) is an alternative promising nanotechnology for semiconductor transistor based technology. QCA benefits from several characteristics, including high speed and low power usage, and could be employed in extremely dense structures. One of the important issues in arithmetic circuits is design of full subtractor/ full adder (FS/ FA), respectively. This paper proposed […]

Original Article
A New Low Power, Area Efficient 4-bit Carry Look Ahead Adder in CNFET Technology

In this paper, a new hybrid low-power and area efficient Carry Look-Ahead Adder in CNFET technology based on the full-swing Gate Diffusion Input (GDI) technique is proposed. The proposed CLA design in GDI logic style, not only decreases the circuit area effectively but also decreases the power consumption and delay parameters as well. The proposed […]