10.57647/j.ijnd.2025.1603.22

Improvement of digital and analog/RF performances of stacked gate oxide JLTFET using heterostructure and lightly doped drain

  1. Department of Electrical Engineering, Lan.C., Islamic Azad University, Langarud, Iran
Improvement of digital and analog/RF performances of stacked gate oxide JLTFET using heterostructure and lightly doped drain

Received: 2024-12-16

Revised: 2025-01-18

Accepted: 2025-01-20

Published in Issue 2025-06-01

How to Cite

Pourahmadi, M., & Alavi-Rad, H. (2025). Improvement of digital and analog/RF performances of stacked gate oxide JLTFET using heterostructure and lightly doped drain. International Journal of Nano Dimension, 16(3 (July 2025). https://doi.org/10.57647/j.ijnd.2025.1603.22

PDF views: 286

Abstract

In this paper, a novel heterostructure stacked gate oxide junctionless tunnel field effect transistor (HS-SGO-JLTFET) with a lightly doped drain (LDD) region is proposed. The low band gap material (InAs) in the source region generates a stronger electric field in the source-channel junction, thereby increasing the ON current to 1.8×10-4 A/µm. Conversely, the lightly doped drain region near the channel end mitigates the electric field in the channel-drain junction, reducing the ambipolar current to 1.26×10-15 A/µm. Furthermore, the performance of the proposed device is analyzed with respect to analog/RF parameters. In this regard, the LDD-HS-SGO-JLTFET exhibits a smaller gate-to-drain capacitance (Cgd) of 0.14 fF, a larger transconductance (gm) of 840 µs, a higher cutoff frequency (fT) of 271 GHz, a bigger gain bandwidth product (GBWP) of 112 GHz,   and a lower transit time ( ) of 6.55×10-13 s compared to the SGO-JLTFET. These improvements demonstrate that the proposed device is highly suitable for low-power and high-frequency applications.

Keywords

  • Ambipolar Current,
  • Heterostructure,
  • Junctionless Tunnel Field Effect Transistor,
  • Lightly Doped Drain,
  • ON Current,
  • Stacked Gate Oxide

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