ASADPOUR, Ailin; SABBAGH, Amir; EMRANI, Azadeh. A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System. Majlesi Journal of Electrical Engineering, [S. l.], v. 18, n. 2, 2024. DOI: 10.57647/j.mjee.2024.1802.29. Disponível em: https://oiccpress.com/mjee/article/view/7980. Acesso em: 22 apr. 2026.