Rahnamaei, Ali, and Azadeh Kiani Sarkaleh. “High Performance Low Latency 16×16 Bit Booth Multiplier Using Novel 4-2 Compressor Structure”. Majlesi Journal of Electrical Engineering 14, no. 2 (February 15, 2024). Accessed May 23, 2026. https://oiccpress.com/mjee/article/view/4862.