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<ArticleSet>
<Article>
<Journal>
<PublisherName>OICC Press</PublisherName>
<JournalTitle>Majlesi Journal of Electrical Engineering</JournalTitle>
<Issn>2345-3796</Issn>
<Volume>5</Volume>
<Issue>2</Issue>
<PubDate PubStatus="epublish">
<Year>2024</Year>
<Month>02</Month>
<Day>25</Day>
</PubDate>
</Journal>
<ArticleTitle>High Performance Channel Decoders on CELL Broadband Engine for WiMAX System</ArticleTitle>
<VernacularTitle></VernacularTitle>
<FirstPage></FirstPage>
<LastPage></LastPage>
<ELocationID EIdType="doi">10.1234/mjee.v5i1.377</ELocationID>
<Language>EN</Language>
<AuthorList>
<Author>
<FirstName>Xiang</FirstName>
<LastName>Chen</LastName>
<Affiliation>Wireless Center, RIIT, Tsinghua</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Ming</FirstName>
<LastName>Zhao</LastName>
<Affiliation>Nanjing University of Aeronautics and Astronautics, China</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Jianwen</FirstName>
<LastName>Chen</LastName>
<Affiliation>Unknown</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Jing</FirstName>
<LastName>Wang</LastName>
<Affiliation>Unknown</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
</AuthorList>
<PublicationType>Journal Article</PublicationType>
<History>
<PubDate PubStatus="received">
<Year>2024</Year>
<Month>02</Month>
<Day>25</Day>
</PubDate>
</History>
<Abstract>Wireless baseband processing, which is characterized by high computational complexity and high data throughput, is regarded as the most challenging issue for software radio (SR) systems, especially for the General Purpose Processor (GPP)-based SR systems. To overcome this implementation difficulty in SR systems, the multicore architecture has been proposed as the GPP-based SR platform, for example, multicore Central Processing Unit (CPU), Graphic Processing Unit (GPU) and Cell processors. In this paper, the Cell processor is considered as the core component in the GPP-based SR platform, and the channel decoding modules for convolutional, Turbo and Low-density parity-check (LDPC) codes of WiMAX systems are investigated and efficiently implemented on Cell processor. With a single Synergistic Processor Element (SPE) running at 3.2GHz, the implemented channel decoders can throughput up to 30Mbps, 1.36Mbps and 1.71Mbps for the above three codes, respectively. Moreover, the decoding modules can be easily integrated to the SR system and can provide a highly integrated SR solution.</Abstract>
<ObjectList>
<Object Type="keyword">
<Param Name="value">channel decoding</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Convolutional codes. China Government Funding</Param>
</Object>
<Object Type="keyword">
<Param Name="value">IBM OCR and SUR programs</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Software Radio</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Wireless communication</Param>
</Object>
</ObjectList>
</Article>
</ArticleSet>