<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE ArticleSet PUBLIC "-//NLM//DTD PubMed 2.7//EN" "https://dtd.nlm.nih.gov/ncbi/pubmed/in/PubMed.dtd">
<ArticleSet>
<Article>
<Journal>
<PublisherName>OICC Press</PublisherName>
<JournalTitle>Majlesi Journal of Electrical Engineering</JournalTitle>
<Issn>2345-3796</Issn>
<Volume>16</Volume>
<Issue>4</Issue>
<PubDate PubStatus="epublish">
<Year>2022</Year>
<Month>12</Month>
<Day>15</Day>
</PubDate>
</Journal>
<ArticleTitle>Low Power Broadband sub-GHz CMOS LNA with 1 GHz Bandwidth for IoT Applications</ArticleTitle>
<VernacularTitle></VernacularTitle>
<FirstPage></FirstPage>
<LastPage></LastPage>
<ELocationID EIdType="doi">10.30486/mjee.2022.696519</ELocationID>
<Language>EN</Language>
<AuthorList>
<Author>
<FirstName>Farshad</FirstName>
<LastName>Shirani Bidabadi</LastName>
<Affiliation>ShahrekoShahrekord University, Department of Technology and Engineering, Shahrekord, Iranr University</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Sayed Vahid</FirstName>
<LastName>Mir-Moghtadaei</LastName>
<Affiliation>Shahrekord University, Department of Technology and Engineering, Shahrekord, Iran</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
</AuthorList>
<PublicationType>Journal Article</PublicationType>
<History>
<PubDate PubStatus="received">
<Year>2022</Year>
<Month>12</Month>
<Day>15</Day>
</PubDate>
</History>
<Abstract>This paper presents a broadband low-power CMOS low noise amplifier (LNA) in 130 nm technology for sub-GHz Internet of Things (IoT) applications. The proposed circuit consists of a current reuse common source amplifier (CSA) in the forward path, and a positive simple transconductance amplifier (PSTA) in the feedback path. Theoretical calculation of the input admittance shows a positive part that presents a parallel inductance. This equivalent parallel inductance in the input can cancel out the input capacitance of CSA and electrostatic discharge (ESD) pad, enhancing the frequency bandwidth in the sub-GHz frequency band. Post-layout was simulated including ESD pads and package model in 130 nm CMOS technology, LNA achieves a voltage gain of 16.5 dB in a frequency bandwidth of 50 MHz to 1.1 GHz, noise figure (NF) of less than 2.4 dB, input return loss (S11) of -11 dB, input third order intercept point (IIP3) of -11 dBm and 1 mW power consumption from a 1 V power supply, showing a good figure of merit compared to other works. The occupied core area is less than 0.002 mm2.</Abstract>
<ObjectList>
<Object Type="keyword">
<Param Name="value">ANN</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Broadband LNA</Param>
</Object>
<Object Type="keyword">
<Param Name="value">GUI</Param>
</Object>
<Object Type="keyword">
<Param Name="value">IoT</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Low-power</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Prediction</Param>
</Object>
<Object Type="keyword">
<Param Name="value">PV panel</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Solar output</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Sub-GHz CMOS LNA</Param>
</Object>
</ObjectList>
</Article>
</ArticleSet>