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<Article>
<Journal>
<PublisherName>OICC Press</PublisherName>
<JournalTitle>Majlesi Journal of Electrical Engineering</JournalTitle>
<Issn>2345-3796</Issn>
<Volume>20</Volume>
<Issue>2 (June 2026)</Issue>
<PubDate PubStatus="epublish">
<Year>2026</Year>
<Month>06</Month>
<Day>30</Day>
</PubDate>
</Journal>
<ArticleTitle>A Novel Switched Capacitor Multilevel Inverter for Renewable Energy Application</ArticleTitle>
<VernacularTitle></VernacularTitle>
<FirstPage></FirstPage>
<LastPage></LastPage>
<ELocationID EIdType="doi">10.57647/mjee.2026.2002.09</ELocationID>
<Language>EN</Language>
<AuthorList>
<Author>
<FirstName>Prayag Chandra</FirstName>
<LastName>Barik</LastName>
<Affiliation>Department of Electrical and Electronics Engineering, ARKA JAIN University, Mohanpur, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Kasinath</FirstName>
<LastName>Jena</LastName>
<Affiliation>Department of Electrical and Electronics Engineering, ARKA JAIN University, Mohanpur, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Krishna Kumar</FirstName>
<LastName>Gupta</LastName>
<Affiliation>Department of Electrical and Instrumentation, Thapar Institute of Engineering &amp; Technology, Patiala, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Debashish</FirstName>
<LastName>Mishra</LastName>
<Affiliation>Department of Electrical Engineering, Konark Institute of Science and Technology, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
</AuthorList>
<PublicationType>Journal Article</PublicationType>
<History>
<PubDate PubStatus="received">
<Year>2026</Year>
<Month>06</Month>
<Day>30</Day>
</PubDate>
</History>
<Abstract>This paper introduces a novel single-phase five-level switched-capacitor multilevel inverter (5L-SCMLI) topology distinguished by self-voltage balancing and intrinsic voltage enhancement capabilities. Without an extra DC-DC boost converter or transformer, the proposed topology (PT) provides a voltage gain factor of two. The PT produces a five-level output voltage utilizing only eight switches and two capacitors, hence offering a more compact, cost-effective, and efficient design. The proposed design implements the PWM technique for the smooth operation of the PT. A comprehensive comparison with the current SCMLI design highlights the PT benefits. To assess the usefulness of the proposed methodology, extensive simulations and experimental investigations have been executed to confirm the effectiveness of PT. The PT stands out as the most cost-effective design at only 73.44 USD.</Abstract>
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<Param Name="value">Cost function</Param>
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<Object Type="keyword">
<Param Name="value">Multilevel inverter</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Switched capacitors</Param>
</Object>
<Object Type="keyword">
<Param Name="value">PD-PWM</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Switch count</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Total voltage stress</Param>
</Object>
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