OICC Press International Journal of Nano Dimension 2228-5059 15 2 (April 2024) 2024 03 30 Impact of nanometric buried Oxide layer on subthreshold swing and drain conductance of junctionless accumulation mode MOSFET for analog circuit applications 10.57647/j.ijnd.2024.1502.12 EN Supratim Datta Department of Electronics and Communication Engineering, RCC Institute of Information Technology, India. 0009-0002-6544-9389 Arpan Deyasi Department of Electronics and Communication Engineering, RCC Institute of Information Technology, India. 0000-0003-3056-896X Arighna Basak Department of Electronics and Communication Engineering, Brainware University, India. 0000-0003-3350-4451 Angsuman Sarkar Department of ECE, Kalyani Government Engineering College, West Bengal, India. 0000-0002-8709-7532 Journal Article 2024 03 30 Drain conductance to drain current ratio is analytically investigated for junctionless accumulation mode MOSFET in presence of ultrathin buried oxide layer invoking the effect of conduction band tunnelling, within realistic range of dimensional configurations in nano regime. By taking into account the flatband voltage's influence and the image charge effect at the oxide-semiconductor interface, subthreshold swing is evaluated over practical range of applied bias. Comparative study reveals that 42% and 36.5% improvements are found with published literature for the conductance to current ratio, whereas reduction of corresponding subthreshold swing is 51% and 34% respectively, considering all the data are computed w.r.t reported value of drain current; for identical structural and electrical configurations. Accuracy of the analytical findings is verified against that of the TCAD software's numerical analysis. Result speaks in favour of the proposed candidate for amplifying low voltage signal in large scale along with suppression of leakage effect for analog amplifier applications.