OICC Press International Journal of Nano Dimension 2228-5059 12 3 2024 02 03 Design, simulation and analysis of high-K gate dielectric FinField effect transistor 10.22034/ijnd.2021.681554 EN Marupaka Aditya MEMS Research Center, Department of Electronics and Communication Engineering, KoneruLakshmaiah Education Foundation (Deemed to be University), Green Fields, Vaddeswaram, Andhra Pradesh, India. 10.22034/ijnd.2021.681554 Karumuri Srinivasa Rao MEMS Research Center, Department of Electronics and Communication Engineering, KoneruLakshmaiah Education Foundation (Deemed to be University), Green Fields, Vaddeswaram, Andhra Pradesh, India. Kondavitee Girija Sravani National MEMS Design Center, Department of Electronics and Communication Engineering, National Institute of Technology, Silchar, Assam, India. Journal Article 2024 02 03 The devices with additional gates like Fin Field effect transistor (FinFET) provide higher control on subthreshold parameters and are favorable for Ultra large-scale integration. Also, these structures provide high control on current through the channel and with minimum leakage. In this paper we designed a FinFET with high-K gate dielectric material i.e Hafnium oxide as gate oxide. A comparison of similar sized transistor with Air and Silicon dioxide as gate material is performed. The comparison is mainly in terms of performance parameters like transconductance, subthreshold slope, and drain current characteristics. There is an increase in ON current on using a high-K dielectric material and subsequently an improvement in other parameters like subthreshold slope, transconductance and intrinsic gain.