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<Article>
<Journal>
<PublisherName>OICC Press</PublisherName>
<JournalTitle>International Journal of Nano Dimension</JournalTitle>
<Issn>2228-5059</Issn>
<Volume>17</Volume>
<Issue>2 (April 2026)</Issue>
<PubDate PubStatus="epublish">
<Year>2026</Year>
<Month>06</Month>
<Day>22</Day>
</PubDate>
</Journal>
<ArticleTitle>Enhanced Electrostatic Control and Biosensing in a No Junction Gate all Around Hetero Dielectric Tunnel Field Effect Transistor (NJGAA-HTFET): A Nanoscale Study Through Analytical Modeling and TCAD Simulation</ArticleTitle>
<VernacularTitle></VernacularTitle>
<FirstPage></FirstPage>
<LastPage></LastPage>
<ELocationID EIdType="doi">10.57647/ijnd.2026.1703.08</ELocationID>
<Language>EN</Language>
<AuthorList>
<Author>
<FirstName>Vimala</FirstName>
<LastName>Palanichamy</LastName>
<Affiliation>Department of ECE, Dayananda Sagar College of Engineering, Bengaluru, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Sharon Geege</FirstName>
<LastName>Augustine</LastName>
<Affiliation>Department of ECE, National Engineering College, Tamilnadu, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Arun Samuel Thankamony</FirstName>
<LastName>Sarasam</LastName>
<Affiliation>Department of ECE, National Engineering College, Tamilnadu, India</Affiliation>
<Identifier Source="ORCID">https://orcid.org/0000-0001-8887-1748</Identifier>
</Author>
<Author>
<FirstName>Suveetha</FirstName>
<LastName>Dhanaselvam</LastName>
<Affiliation>Department of ECE, Velammal College of Engineering &amp; Technology, Madurai, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
<Author>
<FirstName>Jayagowri</FirstName>
<LastName>Ramamoorthy</LastName>
<Affiliation>Department of ECE, BMS College of Engineering, Karnataka, Bengaluru, India</Affiliation>
<Identifier Source="ORCID"></Identifier>
</Author>
</AuthorList>
<PublicationType>Journal Article</PublicationType>
<History>
<PubDate PubStatus="received">
<Year>2026</Year>
<Month>06</Month>
<Day>22</Day>
</PubDate>
</History>
<Abstract>In the modern era of miniaturization, Tunnel Field Effect Transistor (TFET) is considered to be a dominant device for low-power applications due to its primary switching mechanism. The concept of TFETs is that quantum tunnelling across a barrier is regulated, whereas in conventional MOSFETs, the thermionic emission across a barrier is regulated. In this paper, the No Junction Gate All Around Hetero Dielectric Tunnel Field Effect Transistor (NJGAA-HTFET) is modelled at large drain voltage, even though the effect of drain voltages is less pronounced. Theoretical tests have proved that using the low-voltage TFETs in logic circuits instead of MOSFETs, will conserve significant amounts of electricity. Hence, this work presents the analytical modelling of the No Junction Gate All Around Hetero Dielectric Tunnel Field Effect Transistor, where surface potential profile, IDS VGS, and IDS VDS characteristics are analytically modelled using the Kane approach. A comparison of TCAD simulation and modeling under various device parameters, including gate oxide dielectric constant, channel lengths, and junction/junctionless structures, is conducted and further discussed to validate the model. The results of the Ion/Ioff ratio of the proposed device prove to be superior to those of conventional JLTFET devices. More specifically, the NJGAA-HDTFET is identified for use as a biosensor to detect various biomolecules.</Abstract>
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<Param Name="value">TFET</Param>
</Object>
<Object Type="keyword">
<Param Name="value">Nanometer</Param>
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<Object Type="keyword">
<Param Name="value">No junction</Param>
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<Param Name="value">Gate all around</Param>
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<Param Name="value">TCAD</Param>
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<Param Name="value">Analytical model</Param>
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<Param Name="value">Parabolic approximation</Param>
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