OICC Press Majlesi Journal of Electrical Engineering 2345-3796 16 1 2022 03 15 A CMOS Low-Power Noise Shaping-Enhanced SMASH ΣΔ Modulator 10.52547/mjee.16.1.95 EN Habibeh Fakhraie Department of Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran Tohid Moosazadeh Department of Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran Reza Sabbaghy Department of Electrical Engineering, Central Tehran Branch, Islamic Azad University, Niayesh Building, Emam Hasan Blvd, Pounak, Tehran, Iran Alireza Hassanzadeh ECE Department, Shahid Beheshti University, Tehran, Iran Journal Article 2022 03 15 A discrete-time (DT) high-resolution and low-power sturdy multi-stage noise-shaping (SMASH) sigma-delta (ΣΔ) modulator is introduced. It proposes major solution for high-resolution applications relying on M-bit digital input-feedforward (DFF) technique which eliminates a power-hungry analog adder before the stage’s quantizer, decreases number of comparators for quantizer implementation and reduces the swing of the integrator’s output and a 2nd-order noise-coupling (NC) technique realized by few extra analog paths and enhances the noise shaping of the modulator without adding active blocks. The effectiveness of the introduced modulator is supported by the behavioral simulation and extensive mathematical analyses. The proposed modulator along with conventional one is simulated in a 0.18μm CMOS technology. The results indicate an outstanding improvement in dynamic range (DR) and resolution with less complexity.